Yeah, this advanced packaging stuff is pretty new, where they figured out how to make little chiplets but still put them onto the same package, connected by new tech that finally allows for high speed, low latency connections between chiplets (without causing dealbreaker temperature issues). That’s opened up a lot of progress even as improving the circuits on the silicon itself has run into engineering challenges.

So while TSMC seemingly ahead of its competition on actually printing circuits on silicon with smaller and denser features, advanced packaging tech is going a long way in allowing companies to mix and match different pieces of silicon with different strengths and functionality (for a more cost effective end solution, and making better use of the nodes that aren’t at the absolute bleeding edge).

Engineers are doing all sorts of cool stuff right now.